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Mixed signal processors

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posted on 2017-08-01, 00:00 authored by Behnam Sedighi, Indranil Palit, Michael Niemier, Sharon Hu Xiaobo
Various processor architectures for mixed signal computation exploit the unique characteristics of advanced CMOS technologies, such as fin-based, multi-gate field effect transistors, and/or emerging technologies such as tunnel field effect transistors (TFETs). The example processors disclosed herein are cellular neural network (CNN)-inspired and eliminate the need for voltage controlled current sources (VCCSs), which have previously been utilized to realize feedback and feed-forward templates in CNNs and are the dominant source of power consumption in a CNN array. The example processors replace VCCSs with comparators, which can be efficiently realized with TFETs given their high intrinsic gain. Power efficiencies are in the order of 10,000 giga-operations per second per Watt (GOPS/W), which represents an improvement of more than ten times over state-of-the-art architectures seeking to accomplish similar information processing tasks.

History

Patent Number

US 9712146 B2

Other Application

14/858,749

Inventor

Behnam Sedighi Michael Niemier Xiaobo Sharon Hu Indranil Palit

Inventor from Local Institution

Behnam Sedighi Michael Niemier Xiaobo Sharon Hu Indranil Palit

Assignee

University of Notre Dame du Lac

Date Modified

2017-08-01

Language

  • English

Claims

17

Prior Publication Number

US 20170085255 A1

Publisher

U.S. Patent and Trademark Office

Cooperative Patent Classification Codes

H03K 5/2472 (20130101); H03K 3/012 (20130101); H03L 7/18 (20130101)

Contributor

Behnam Sedighi|Michael Niemier|Xiaobo Sharon Hu|Indranil Palit

International Patent Classification Codes

H03K 5/153 (20060101); H03L 7/18 (20060101); H03K 3/012 (20060101); H03K 5/24 (20060101)

Additional Groups

  • Computer Science and Engineering
  • Electrical Engineering

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