Engineering of Silicon and Germanium Tunnel Diodes for Integrated Circuit Application

In recent years, the tunnel diode has attracted interest from companies and researchers. Integrating tunnel diodes with transistors provide input-out isolation, gain and fan-out ability which the tunnel diode by itself lacks. The sparsity of tunnel diode fabrication processes compatible with transistor processing hinders the wider use of the device. Fabrication processes, which could be applied to integrated tunnel diode/transistor circuits on Si and Ge, are explored in this work.

Silicon tunnel diodes were demonstrated in both vertical and lateral geometries using spin-on diffusants and rapid thermal processing. Silicon tunnel diodes were first formed in the substrate plane through an oxide window process, with peak current densities of approximately 1μA/ÌÂm² and peak-to-valley ratio of approximately 1.3. A self-aligned lateral fabrication process, which forms the junction perpendicular to the substrate plane, has also been successfully developed and yielded backward Si tunnel diodes with peak current densities of 30 nA/ÌÂm². To the author's knowledge, these accomplishments are the first demonstration of lateral Si tunnel diodes using spin-on diffusants and rapid thermal processing. Low current density tunnel diodes can find applications as zero biased detector.

Germanium tunnel diodes were demonstrated both using a diffusion-based approach and an on-wafer liquid-phase regrowth approach. The diffusion-based approach utilized spin-on diffusants and rapid thermal processing. Germanium tunnel diodes with current densities up to 0.6 nA/̲ and PVR of 1.1 were demonstrated for the first time using this approach. An on-wafer liquid-phase regrowth approach with a silicon nitride microcrucible was developed. Germanium TDs with current densities up to 1.2 mA/ÌÂm2 were demonstrated. A primary goal of this project, demonstration of a 1 mA/ÌÂm2 tunnel junction, was fulfilled.