Through-Silicon-Via Inductor in Three-Dimensional Integrated Circuits: Modeling and Design for On-Chip Applications

This work focuses on the study of through-silicon-via (TSV) inductor and its utilization in various on-chip applications such as DC-DC converter and resonant clocking. TSVs are the critical enabling technology for three-dimensional integrated circuits (3D ICs). TSVs can be potentially used to implement inductors in 3-D integrated systems for a minimal footprint. However, different from conventional 2-D spiral inductors, TSV inductors are fully buried in the lossy substrate, thus suffering from low quality factor at high frequencies. On the other hand, a major limiting factor for the implementation of many on-chip circuits such as DC-DC converters and resonant clocking is the large area overhead induced by spiral inductors. Towards this, we propose to use TSV inductor instead of the spiral inductor to reduce the inductor area overhead.

In this work, we first systematically examine how various process and design parameters affect the performance of TSV inductor. We then propose a novel shield mechanism utilizing the microchannel, a technique conventionally used for heat removal, to reduce the substrate losses at high frequencies. We also discuss on-chip magnetics based TSV inductor for high inductance density. We then demonstrate the effectiveness of such TSV inductors in Inductive DC-DC converters. A single inductor multi-tier single voltage regulator design in 3D ICs with time-sharing and spatial-sharing techniques is also proposed and is compared with the conventional design scheme. We then study the effectiveness of TSV inductor in the resonant clocking scheme. Experimental results show that by replacing conventional spiral inductors with TSV inductors, inductor area reduced by up to 6.3x for on-chip applications.