Tunneling-Based Memory and Advances in Indium Phosphide-Based Processing

This research explores InP-based tunnel diodes to supplement existing memory and high speed IC technology. Tunneling-based static random access memory (TSRAM) uses the bistability of tunnel diodes to construct memory elements and requires tunnel diodes with peak currents exceeding transistor leakage currents, high peak-to-valley ratio (PVR) and low valley currents and voltages. InAlAs-InGaAs resonant interband tunnel diodes (RITD) were investigated for TSRAM through design, fabrication and electrical characterizations. In particular, the effects of doping density, barrier thicknesses and alloy composition on the RITD properties were studied. Tunnel diodes with peak and valley currents spanning 5 orders of magnitude, with PVRs as high as 70 were demonstrated through 3x variation in the effective doping density. Valley currents as low as 0.07 nA/ extmu m$^2$, which is the lowest reported for TSRAM tunnel diodes, and valley voltages as low as 250 mV were demonstrated. Submicron device scaling was explored through the development of a fabrication process. To reduce the parasitics in tunnel diode/transistor integrated circuits, a novel self-aligned contact process using dielectric spacers and benzocyclobutene etchback was developed. Silicon nitride and oxide spacer sidewalls were demonstrated through the development of anisotropic plasma etches. InP-based monolithically integrated resonant tunnel diodes and heterojunction bipolar transistors were fabricated using this process and electrically characterized.