9,825,132OCR.pdf (1.63 MB)
Systems and methods for filtering and computation using tunneling transistors
standard
posted on 2017-11-30, 00:00 authored by Behnam Sedighi, Joseph J. Nahas, Michael Niemier, Sharon Hu XiaoboAn electrical circuit is disclosed that comprises plurality of tunneling field-effect transistors (TFETs) arranged in a diffusion network matrix having a plurality of nodes wherein, for each of the TFETs that is not on an end of the matrix, a drain of the TFET is electrically coupled with the source of at least one of the other TFETs at a node of the matrix and a source of the TFET is electrically coupled with the drain of at least one of the other TFETs at another node of the matrix. The electrical circuit further comprises a plurality of capacitors, wherein a respective one of the plurality of capacitors is electrically coupled with each node that includes the source of at least one TFET and the drain of at least one TFET. The TFETs may be symmetrical graphene-insulator-graphene field-effect transistors (SymFETs), for example.
History
Patent Number
US 9825132 B2Other Application
14/881,759Inventor
Behnam Sedighi Xiaobo Sharon Hu Michael Niemier Joseph J. NahasInventor from Local Institution
Behnam Sedighi Xiaobo Sharon Hu Michael Niemier Joseph J. NahasAssignee
University of Notre Dame du LacDate Modified
2017-11-30Language
- English
Claims
20Prior Publication Number
2017-04-13Publisher
U.S. Patent and Trademark OfficeCooperative Patent Classification Codes
H01L 29/0895 (20130101); H01L 29/1606 (20130101); H01L 29/7391 (20130101); H03K 19/094 (20130101); H03K 19/185 (20130101); H01L 29/78648 (20130101); H01L 29/66977 (20130101)Contributor
Behnam Sedighi|Xiaobo Sharon Hu|Michael Niemier|Joseph J. NahasInternational Patent Classification Codes
H01L 29/08 (20060101); H01L 29/16 (20060101); H03K 19/094 (20060101); H03K 19/185 (20060101); H01L 29/786 (20060101); H01L 29/739 (20060101); H01L 29/66 (20060101)Additional Groups
- Computer Science and Engineering
- Electrical Engineering
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