Silicon Single Electron Transistors Fabricated by Chemical Mechanical Polishing

Heat dissipation is the fundamental limit to computational performance. In conventional digital architectures, transistors are used as switches to charge and discharge capacitors, and signal transitions between a high-energy state (i.e. logic 1) and a low-energy state (logic 0) either dump the energy to the ground or draw more energy from a power source. Energy has to dissipate to heat in the process. In Quantum-Dot Cellular Automata (QCA), binary information is represented by two arrangements of electrons in the ground states of a QCA cell, and logic operations can be highly energy efficient.

Single electron transistor (SET) can be used to implement QCA, but SET operations at room temperature require extremely small device geometry that remains very difficult to achieve. Miniaturization of silicon-based SETs (SiSET) benefits from Si-related fabrication technologies that are extensively studied and accessible. In a manufacturable 'top-down' approach, fabrication of such nanoscale devices has traditionally relied on the finest resolution of lithography and dry etching. This dissertation reports the development of a SiSET fabrication technique that incorporates a new approach. Chemical Mechanical Polishing (CMP) removes material based on the surface topography instead of a mask, and the integration of CMP in device fabrication has provided us with new possibilities to construct an ideal SiSET.The fabricated devices show that the presence of dopants in the silicon causes Coulomb blockade oscillations (CBO) to be very irregular, which is an undesirable feature for SiSETs to be used as electrometers. By replacing the doped silicon island with aluminum, we produce a composite Al-SiSET with that exhibits periodic CBOs that are similar to an Al/AlOX SET. By eliminating dopants from the island of the SiSET, we are able to study the effects of dopants in the access region in the silicon leads. The Al-SiSETs exhibit various characteristics that are influenced by the electron and the dopant density in the leads. At low temperature, these devices operate as SETs, but at room temperature, tunnel field effect transistor-like behaviors are observed. In conclusion, we have developed a new type of SiSETs by integrating CMP in device fabrication. The fabrication technique has demonstrated great potential to construct an ideal electrometer for QCA.