9,633,976 OCR.pdf (2.35 MB)
Systems and methods for inter-chip communication
standard
posted on 2017-08-01, 00:00 authored by Gary H BernsteinGary H Bernstein, Patrick Fay, Qing Liu, Wolfgang PorodA quilt packaging system includes a first and second electronic device each comprising a plurality of edge surfaces at least a first edge surface of which comprises one or more interconnect modules disposed thereon. The first edge surface of the second electronic device is positioned contiguous to the first edge surface of the first electronic device, and at least one of the one or more interconnect nodules disposed on the first edge surface of the first electronic device is configured to be in physical contact with at least one of the one or more interconnect nodules disposed on the first edge surface of second electronic device so as to provide an electrical connection between the first and second electronic devices at the first edge surfaces of the first and second electronic device.
History
Patent Number
US 9633976 B1Other Application
14/090,993Inventor
Gary H. Bernstein Patrick Fay Wolfgang Porod Qing LiuInventor from Local Institution
Gary H. Bernstein Patrick Fay Wolfgang Porod Qing LiuAssignee
University of Notre Dame du LacDate Modified
2017-08-01Language
- English
Claims
18Publisher
U.S. Patent and Trademark OfficeCooperative Patent Classification Codes
H01L 25/0655 (20130101); H01L 24/67 (20130101)Contributor
Gary H. Bernstein|Patrick Fay|Wolfgang Porod|Qing LiuInternational Patent Classification Codes
H01L 25/00 (20060101); H01L 25/065 (20060101); H01L 23/00 (20060101)Usage metrics
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