Quilt packaging system with mated metal interconnect nodules and voids

Patent

Description

First and second integrated devices each have an optical component and a plurality of interconnect structures disposed one edge thereon. The first edge surface of the second integrated device is positioned contiguous to the first edge surface of the first integrated device. The interconnect structures disposed on the first integrated device are in physical contact with the interconnect structures disposed on the edge surface of the second integrated device so as to provide alignment for conveying at least one signal between the optical components on the first and second integrated devices.

Attributes

Attribute NameValues
Title
  • Quilt packaging system with mated metal interconnect nodules and voids

Patent Number
  • US 10050027

USPTO Link
Inventor
  • Douglas C. Hall

  • Anthony Hoffman

  • Scott Howard

  • Jason M. Kulick

  • Gary H. Bernstein

Inventor From Local Institution
  • Douglas C. Hall

  • Anthony Hoffman

  • Scott Howard

  • Jason M. Kulick

  • Gary H. Bernstein

Other Application
  • 15/448,026

Prior Publication Date
  • 2017-06-22

Prior Publication Number
  • US 2017/0179093 A1

Claims
  • 8

Cooperative Patent Classification codes
  • H01L 25/167 (20130101); H01L 22/12 (20130101); H01L 24/17 (20130101); H01L 24/70 (20130101); G02B 6/423 (20130101); G02B 6/4238 (20130101); G02B 6/4257 (20130101); H01L 2224/175 (20130101); H01L 2224/1718 (20130101)

International Patent Classification codes
  • H01L 23/00 (20060101); H01L 21/66 (20060101); H01L 25/16 (20060101)

Language
  • English

Date Issued
  • 2018-08-14

Publisher
  • U.S. Patent and Trademark Office

Assignee
  • Indiana Integrated Circuits, LLC

  • University of Notre Dame Du Lac

Record Visibility Public
Content License
  • All rights reserved

Departments and Units
Member of

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