High-Power Vertical GaN Electronic Devices Formed by Epitaxial Lift-Off

GaN and related materials have become one of the most promising material systems for high efficiency power electronics due to their unique material properties, such as a high critical electrical field, large band gap, high electron saturation velocity, large electron mobility, and high thermal conductivity compared with alternatives, such as Si, GaAs and SiC. However, the actual performance of many lateral GaN devices has fallen short of expectations, including large ideality factors, the inability to achieve avalanche breakdown, dynamic on-state resistance, current collapse, and hysteresis in FETs. Unlike other power device options, most GaN devices are built on lattice-mismatched non-native substrates such as sapphire or SiC because of the high cost and limited availability of bulk GaN substrates. These foreign substrates result not only in large dislocation densities, but also limited thermal conductance for heat removal. This work focuses on the development of several GaN power device concepts, such as Schottky diodes and p-n diodes for high efficiency power switching applications, made possible by vertical device architectures. The prospects for, and benefits of fabrication processing using epitaxial lift-off (ELO) using band gap selective photoelectrochemical (PEC) etching techniques are also examined.

Vertical devices are advantageous for power applications because they can utilize thick low-doped drift layers to achieve higher breakdown voltages. This leads to smaller die sizes than comparable lateral devices. On the other hand, vertical devices are more sensitive to the presence of threading dislocations and thus must be made on high quality bulk GaN substrates for best performance. ELO technology has the potential to allow cost-effective device production using native GaN substrates through substrate re-use, as well as to improve thermal performance of devices by eliminating the thermal resistance associated with conventional substrates by enabling direct thermal and electrical bonding. To investigate vertical GaN devices and the potential benefits of ELO processing, Schottky diodes and p-n junction diodes have been fabricated and tested. The Schottky device results suggests that ELO processing could potentially improve device performance for devices on non-native substrates. In addition, to realize high-voltage, high-current vertical GaN-on-GaN power diodes and surmount the limitations of mesa-isolated power diodes, we developed a new vertical p-n diode design with ion-implantation edge termination (ET), sputtered SiNx passivation and back-side cathode contacts. The measured devices exhibit a breakdown voltage exceeding 1.68 kV, with differential specific on resistances of 0.15 mOmega-cm2. A Baliga's figure-of-merit (BFOM) of 18.8 GW/cm2 is obtained; this is among the highest reported BFOMs for GaN homoepitaxial p-n diodes. These devices also exhibit near-ideal scaling with area, enabling currents as high as 12 A for a 1 mm diameter device. To investigate the effect of ELO processing on devices on bulk GaN substrates, a comparison study was performed on the devices after lift-off processing (after transfer to a Cu carrier wafer) and nominally-identical control devices (on a bulk GaN substrate and without the buried release layer). The results show that ELO-processed devices have nearly identical electrical performance---and improved thermal performance---compared to devices on full-thickness GaN substrates. In addition to these high power diodes, vertical GaN MESFETs have been designed and simulated, and functional devices have been obtained.