Investigation of III-V Tunneling Field-Effect Transistors

Doctoral Dissertation


This dissertation reviews an investigation of III-V Tunneling Field Effect Transistors (TFETs), both experimentally and by simulation. TFETs are an attractive candidate for low voltage CMOS devices due to the ability to achieve steep subthreshold swing, below the 60 mV/decade limit of the MOSFET. III-V TFETs, as opposed to Si based TFETs, are attractive due to the direct energy band gaps, low effective masses, and ease of heterostructure engineering, which result in large tunneling current densities. Here, two categories of TFETs were explored: the lateral InGaAs TFET with a regrown source by molecular beam epitaxy (MBE) and an L-shaped GaSb/InAs TFET with a raised drain and buried channel structure. Each device was simulated in Sentaurus S-device TCAD to gain basic device understanding and to determine the affect of geometrical parameters on the device performance. Experimentally, the lateral InGaAs TFET was fabricated, and a crystalline and continuous regrown junction was achieved. The device performance was correlated with TCAD predictions with an ON state performance of 0.052 μA/μm at VDS = 1 V. Through temperature dependent measurements, it was found the junction is likely underlapped with respect to the gate metal edge by approximately 20 nm. To increase the current levels, the GaSb/InAs heterojunction with broken gap band alignment was investigated in an L-shaped geometry, which aligns the gate and internal junction electric fields. This geometry was previously explored in our group with promising results. Here, a second generation device architecture was explored with a raised drain to reduce parasitic resistances, and a buried channel, in an effort to mitigate high interface trap densities at the semiconductor/gate oxide interface. A maximum current of 277 μA/μm was achieved at VDS = 0.5 V, showing the promise of the GaSb/InAs heterojunction in delivering high current density. In addition for the first time, a negative differential transconductance effect was found experimentally in this device, and explained through TCAD simulation. Finally, TCAD was used to design GaSb/InAs p-type TFETs in the L-shaped geometry. The best device showed an ON state current of 38 μA/μm with an effective subthreshold swing of 46 mV/dec at VDS = -0.3 V and IOFF = 1 nA/μm. In addition, it was found the subthreshold swing increases as a function of the source doping concentration.


Attribute NameValues
  • etd-04162014-152907

Author Timothy J Vasen
Advisor Greg Snider
Contributor Mark Wistey, Committee Member
Contributor Greg Snider, Committee Member
Contributor Grace Xing, Committee Member
Contributor Alan Seabaugh, Committee Member
Degree Level Doctoral Dissertation
Degree Discipline Electrical Engineering
Degree Name PhD
Defense Date
  • 2014-04-15

Submission Date 2014-04-16
  • United States of America

  • steep swing

  • TFET

  • CMOS

  • III-V

  • University of Notre Dame

  • English

Record Visibility Public
Content License
  • All rights reserved

Departments and Units


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