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Circuits and Architectures for Data-Centric Computing

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posted on 2021-11-30, 00:00 authored by Dayane Alfenas Reis

As applications become highly data-centric, there are major challenges associated with (i) the limitations of CMOS technology for the design of on-chip (fast access, dense) memories, (ii) the practicality of transferring high volumes of data between the processor and main memory, and (iii) the security and privacy of client’s data stored in external servers, which have become a very popular demand in the last years. In this dissertation, I adopt a bottom-up perspective -i.e., from devices to architectures - to look at potential alternatives to address these issues associated with a high volume of data handling and processing.

First, despite advancements enabled by CMOS scaling, as transistors shrink, quantum effects and current leakage in conventional CMOS technology becomes very significant, which results in prohibitively high static power consumption. Furthermore, low density and high leakage power associated with 2-D Static SRAMs built with CMOS make it challenging to satisfy the growing on-chip memory demands from data-centric applications. In this regard, in this dissertation, I explore emerging technologies, with a focus on Ferroelectric Field-Effect Transistors (FeFETs). Emerg- ing technologies enable the design of better on-chip memory alternatives which can improve density and/or energy consumption.

Second, the high volume of data movement may result in a slowdown in the performance of data-intensive programs, and high energy consumption due to the various memory accesses needed by the application. In this work, computing-in-memory architectures (CiM) are proposed as solutions for overcoming the latency and energy problems associated with data transfer, as they enable a subset of logic, arithmetic, and memory operations associated with a given task are performed in memory (without transfers from/to a processor).

Finally, like speed and energy consumption, the security and privacy of computer systems have become a critical research topic. On one hand, hardware security primitives based on CMOS and emerging technologies ensure that intellectual property (IP) is protected as more specialized computing kernels have emerged to meet the performance demands of a given application. On the other hand, the rise of “Big Data” and computing in the cloud have led to growing concerns regarding the security and privacy of clients’ information that is stored/processed in third-party servers. My research on secure computing described in this dissertation seeks to (i) protect intellectual property through the design of hardware security primitives based on emerging technologies, and (ii) enable secure and private computation in the cloud with specialized IMC-based accelerators for homomorphic encryption (HE) as well as for block ciphers such as the advanced encryption standard (AES).

History

Date Modified

2021-12-22

Defense Date

2021-11-29

CIP Code

  • 40.0501

Research Director(s)

Michael T. Niemier

Committee Members

Yiyu Shi Suman Datta Siddhart Joshi

Degree

  • Doctor of Philosophy

Degree Level

  • Doctoral Dissertation

Language

  • English

Alternate Identifier

1289625169

Library Record

6156069

OCLC Number

1289625169

Program Name

  • Computer Science and Engineering

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