Fabrication of Single Electron Transistors using Atomic Layer Deposition

The main focus in our work is the integration of atomic layer deposited oxide for metallic Single Electron Transistors (SET's). Currently, the choice of SET material is limited to metals that can be thermally oxidized, which has its limitations in terms of thickness control for ultra-thin tunnel barrier oxides. ALD oxides, on the other hand, can be deposited on a variety of metals and have been successfully integrated into current CMOS processes. Our goal is to establish a fabrication process that uses alumina as tunnel barriers sandwiched between two platinum electrodes. Because SET's are very sensitive to background charge, it is an ideal candidate for an on-chip characterization tool to control and monitor the quality of high-k dielectrics currently used in CMOS processing.