Dynamic Voltage and Frequency Scaling (DVFS) has become an accepted and widespread technique to manage power and energy consumption in general-purpose and embedded systems. The careful selection of voltage levels and operating frequencies through DVFS can result in an efficient system that meets deadline, throughput and other timing constraints, while also maximizing the systemÌøåÀå_s lifetime. However, the misuse of DVFS is also possible, which can result in a system that is either less efficient, or fails to meet timing constraints. In the case of a
hard real-time system, this can result in catastrophic failures.
This dissertation extends the state-of-the-art in several areas with respect to DVFS. First, several algorithms are introduced to manage the impact of voltage transition overhead on hard real-time systems, including reducing the increase in energy and eliminating deadline misses. Jitter constraints are also met through DVFS to increase the stability and predictability of such systems. In addition to a single CPU, a dual-resource system consisting of a CPU and a wireless network interface is also examined. Next, the applicability of DVFS as a power-management technique for real-time 3D graphics applications on portable embedded systems is evaluated and an effective graphics-workload prediction technique used to facilitate DVFS is introduced. Finally, the simulation platform used to evaluate each of the proposed techniques is presented. Many open problems are presented along the way which can serve as starting points for future research.